Shri Mata Vaishno Devi University
Approved Under 12(b) & 2(f) of UGC Act 1956
Ranked 85th in Engineering Universities/Institutes and Top 100 Business Schools in National Institutional Ranking Framework (NIRF 2019) declared by MHRD, Govt. of India.

25052019 modelingSimulation

SMVDU, Katra. May 2019. TEQIP-III sponsored One-Week Workshop on “Modeling & Simulation in Ultra Low Power VLSI Design” recently conducted at Shri Mata Vaishno Devi University (SMVDU), Katra. The workshop is organized by the School of Electronics & Communication Engineering, SMVDU. The key objective of the workshop was to provide an exposure to the faculty members/research scholars/students in the field of Modeling & Simulation in Ultra Low Power VLSI Design to enhance their knowledge in the domain. The aim of the workshop was to provide the hands-on practice on available EDA tools with the School. The resource persons for the workshop were from the reputed institutes like IIT Delhi, IIT (BHU), NIT Hamirpur, and from the industry for providing and arranging the hands-on practice for the participants. The workshop coordinators, Dr. Vijay Kumar Sharma and Dr. Sachin Kumar Gupta expressed their gratitude to Vice Chancellor, SMVDU, for his kind permission for organizing this workshop.

New Events-2019

Feb. - Mar. 24 - 07

AICTE Sponsored FDP

AICTE Sponsored FDP on Econometric Applications of Marketing Research and Business Analytics in Management...Read More

Apr. 09 - 10

2nd International Conference

2nd International Conference on Renewable Energy and Sustainable Environment: Challenges and Remedies [ Website Link ]...Read More

May. 18 - 30

National Faculty Development Program

DST-NIMAT Project Sponsored National Faculty Development Program on Entrepreneurship Development....Read More

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University's Achievements

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